English  |  正體中文  |  简体中文  |  2814562  
???header.visitor??? :  27317354    ???header.onlineuser??? :  504
???header.sponsordeclaration???
 		 
???search.scope??? ???search.advance???
臺灣學術機構典藏系統 (Taiwan Academic Institutional Repository, TAIR)
???ui.leftmenu.abouttair???
???ui.leftmenu.explanation???

???ui.leftmenu.bartitle???
Repositories
Author
Title
Date
???ui.leftmenu.statisticschart???
???ui.leftmenu.realtimefacts???
???ui.leftmenu.trend???

???index.news???
2019臺灣學術機構典藏
研討會
機構典藏系統RC7版本已
發佈

???ui.leftmenu.copyrighttitle???
???ui.leftmenu.copyrightpublisher???
???ui.leftmenu.copyrightconference???

???ui.leftmenu.link???
機構典藏計畫網站
ROAR
OpenDOAR
SHERPA
OAIster
JAIRO
Ira
DSPACE
RWWR
臺大學術典藏NTU Scholars
???tair.name??? >  ???browser.page.title.author???

"hungwen lin"???jsp.browse.items-by-author.description???

???jsp.browse.items-by-author.back???
???jsp.browse.items-by-author.order1??? ???jsp.browse.items-by-author.order2???

Showing items 1-10 of 31  (4 Page(s) Totally)
1 2 3 4 > >>
View [10|25|50] records per page

Institution Date Title Author
元智大學 May-22 A 12–14.5-GHz 10.2-mW −249-dB FoM Fractional-N Subsampling PLL With a High-Linearity Phase Interpolator in 40-nm CMOS Yan-Ting Chen; Pen-Jui Peng; Hungwen Lin
元智大學 May-16 低電壓差動訊號模式發射與接收電路 邵致翔; 周世芳; Hungwen Lin
元智大學 Jun-18 LOW-VOLTAGE DIFFERENTIAL SIGNALING TRANSMITTER AND RECEIVER Hungwen Lin; Shih-Fang Jhou; Chih-Hsiang Shao
元智大學 Jun-18 LOW-VOLTAGE DIFFERENTIAL SIGNALING TRANSMITTER AND RECEIVER Hungwen Lin; Shih-Fang Jhou; Chih-Hsiang Shao
元智大學 Jun-18 LOW-VOLTAGE DIFFERENTIAL SIGNALING TRANSMITTER AND RECEIVER Hungwen Lin; Shih-Fang Jhou; Chih-Hsiang Shao
元智大學 Jun-18 LOW-VOLTAGE DIFFERENTIAL SIGNALING TRANSMITTER AND RECEIVER Hungwen Lin; Shihfang Jhoh; Chihhsiang Shao
元智大學 2022-07-06 A Low Process Sensitivity inverter-based RX Analog Front-End Design Tzu-Hao Lin; Hungwen Lin
元智大學 2021-09-15 A Buffer Circuit for the Interface of RF and Baseband System Zhi-Sheng Zhang; Zhi-Yi Chen; Hungwen Lin
元智大學 2020/9/28 A Baseband All-Digital Clock and Data Recovery Circuit with A Limited Range Binary Search FSM Jia-ken Li; Hungwen Lin
元智大學 2020/7/28 A 0.3V, 625Mbps LVDS Driver in 0.18um CMOS Technology Hungwen Lin; Tzu-Hao Lin

Showing items 1-10 of 31  (4 Page(s) Totally)
1 2 3 4 > >>
View [10|25|50] records per page

DSpace Software Copyright © 2002-2004  MIT   &  Hewlett-Packard   /   Enhanced by   NTU Library IR team